12-20 July 2017
Asia/Seoul timezone
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BEXCO - Room F(201/202/203/204)

[GA191] The Slow Control board for the Wide Field of View Cherenkov Telescopes of the LHAASO experiment


  • Giuseppe DI SCIASCIO

Primary authors



The LHAASO (Large High Altitude Air Shower Observatory) experiment is currently under installation at high altitude (4410 m a.s.l., 600 g/cm2, 29,36° N, 100,14° E) in the Daochen site, Sichuan province, P.R. China, with the aim of studying with unprecedented sensitivity the spectrum, the composition and the anisotropy of cosmic rays in the energy range between 1012 and 1018 eV, as well as to act simultaneously as a wide aperture (about 2 sr), continuously operating gamma-ray telescope in the energy range between 1011 and 1015 eV. One of the main detectors of LHAASO is constituted by an array of 18 wide field of view (16°x16°) Imaging Atmospheric Cherenkov Telescopes (IACTs). Unlike the usual IACTs dedicated mainly to gamma-ray astronomy, these telescopes will be devoted to the study of the energy spectrum and elemental composition of the cosmic rays around the “knee” of the all- particle primary spectrum (at about 3x10**15 eV). These telescopes in a second phase of the experiment will be operated as fluorescence detectors to extend the energy range up to 10**18 eV. The focal plane of each telescope will be made by a matrix of 32 x 32 SiPM pixels. The Slow Control board (SLC) has the task of controlling and distributing the high voltages for SiPM mounted on the front end card. The board allows to manage 16 independent channels. For each channel the high output voltage is adjusted in order to ensure the gain and the optimal performance for the SiPM. The control is performed by monitoring, at predetermined moments, the values of temperature and High Voltage (HV) applied, and making appropriate corrections on the HV output. The temperature reading is made with an 12 bits ADC , while the reading of the output HV is made by an 16 bit ADC. The card is also able to implement corrections on HV with an accuracy less than 1mV, and provides a selective switch-off of each channel. All the control logic and communication management, towards the Digital board (DB), will be implemented on FPGA. To the DB board will be sent the measurements of temperature and HV for all 16 channels, as well as the corrections applied. In this paper, the electronic scheme and the components selection are presented and discussed, together with the physics involvements in terms of achievable results.